FUZZY BASED PID CONTROLLER USING VERILOG HDL FOR TRANSPORTATION APPLICATION

    PID controller is the best known as industrial process controller. It is robust in wide range of performance. However, conventional PID controller is not suitable for nonlinear system. Therefore, PID-type Fuzzy Controller is preferred in the non-linear process dueto its simplicity, robustness, and variable structure. Moreover, the PID controller does not require explicit knowledge of the model of the dynamic plant,which is complex and very hard to obtain. The PID controller mostly can be applied to the control process such as motor drives, flight controls, high- speed trains , and others application. Improvement on the PID controller system can lead to huge effect in the control process for industrial application . Fuzzy system is well known with its non-linearity characteristic behaviour. This project is to design of PID -type (Proportional - Integral - Derivative ) controller based on Fuzzy algorithm using Verilog HDL to use in transportation cruising system. The cruising system with Fuzzy concept has developed to avoid the collisions between vehicles on the road. The developed Fuzzy Logic Controller(FLC) provides a reference for controlling the vehicle speed either increase / decrease.The controlling speed depends on the distance of the preceding vehicle when it gets too close or alert the driver when necessary.

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A LOW-POWER MULTIPLIER WITH THE SPURIOUS POWER SUPPRESSION TECHNIQUE

    Lowering down the power consumption and enhancing the processing performance of the circuit designs are undoubtedly the two important design challenges of wireless multimedia and digital signal processor (DSP) applications, in which multiplications are frequently used for key computations, such as fast Fourier transform (FFT), discrete cosine transform (DCT), quantization,and filtering. The multipliers used in such applications require many different operand size. An efficient way to design multipliers is to save the significant power consumption of a VLSI design, it is a good direction to reduce its dynamic power that is the major part of total power dissipation.

BOOTH ENCODER

The multiplier has two stages; the first stage consists of booth encoders which drive partial product generators which in turn drive a carry-save addition array to produce two final partial products. In the second stage , the two final products are added to form the final product through a ripple-carry adder.

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