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Face detection in image sequence has been an active research area in the computer vision field in recent years due to its potential applications such as monitoring and surveillance, human computer interfaces, smart rooms, intelligent robots, and biomedical image analysis. Face detection is based on identifying and locating a human face in images regardless of size, position, and condition. Numerous approaches have been proposed for face detection in images. This based system on Haar features to find the face from the given input image. The main design stages include image scaling, integral image generation, pipelined processing as well as classifier. The architecture for face detection has been designed using Verilog HDL combined with Matlab programming. First the input image is converted into corresponding pixel values the harr classifier is applied using Verilog HDL. Finally, the result face detected result is displayed using Matlab.
REFERENCES
Reference Paper-1: FPGA-Based Face Detection System Using Haar Classifiers
Author’s Name: Junguk Cho, Shahnam Mirzaei , Jason Oberg and, Ryan Kastner
Source: DBLP
Year: 2009
You can DOWNLOAD the Verilog HDL code to execute the design.
SIMULATION VIDEO DEMO
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