VERILOG HDL FOR BINARY TO BCD CONVERTER USING MODELSIM/ XILINX ISE

Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. Binary to BCD conversion forms the basic building block of decimal digit multipliers. This design is based on high-speed low power architecture for fixed bit binary to BCD Conversion. The design tested using Modelsim and Xilinx ISE software.

You can DOWNLOAD the Verilog HDL code to execute the design.

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SIMULATION VIDEO DEMO

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